Conventional sensing schemes for random access memories use dummy cells in order to provide a measure of comparison when determining the state (logic 1 or logic 0) of a memory cell. However, in 64 megabit random access memories and beyond, particularly dynamic random access memories (DRAMs), the space required to implement a dummy cell in a sensing scheme is generally not available. Thus, a need exists to provide a memory cell sensing scheme which does not require the use of a dummy cell.